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Multicore Firmware Development from Ground Up™
Welcome
Course Introduction(Same as Promo) (1:17)
Course Requirements
Introduction to Multicore Systems
What is MultiCore Development (1:33)
Some Challenges in Programming Multicore Systems (2:46)
Understanding the STM32H7 Dual-Core Environment
Key Features of the STM32H7 Dual Core Microcontroller (2:12)
Understanding CoreMark and Dhrystone Millions of Instructions Per Second(DMIPS) (2:17)
The System Overview (4:44)
The Bus Matrix and Power Domain (4:44)
Introduction to STM32H7 Multicore Development
Some Key Abbreviations (1:42)
Overview of Inter-Core Communication Methods (1:30)
The Inter-Processor Communication Controller (IPCC)
Understanding IPCC for Event Notification (2:26)
Understanding IPCC for Remote Service Access (1:55)
Understanding IPCC for Payload Processing (1:31)
Other Inter-Core Communication Methods
Shared Memory for Inter-Core Communication (2:18)
Overview of OpenAMP and RPMsg (4:02)
Message Buffers and Stream Buffers and for Inter-Core Communication (3:57)
Hardware Semaphore(HSEM) and Send-Event Instruction(SEV) (2:44)
DMA and MDMA for Inter-Core Communication (2:11)
Setting Up
Downloading STM32CubeIDE (2:34)
Installing STM32CubeIDE (2:38)
Getting Started with Multi-Core Development
Programming: Getting Required Documentation (5:13)
Programming: Creating a Multicore Project (3:58)
Programming: Overview of th Clock Tree (8:24)
Programming: Assigning Different Peripherals to Different CPUs (5:44)
Programming: Analyzing the Project Tree (3:36)
Programming: Analyzing the main() function of CPU1 (3:42)
Programming: Analyzing the main() function of CPU2 (7:24)
Programming: Creating the Debug Configuration for CPU1 (2:45)
Programming: Creating the Debug Configuration for CPU2 (3:57)
Programming: Implementing the Custom Code for CPU1 and CPU2 (3:43)
Programming: Testing the Multicore Application (4:30)
Programming: Resolving ST-Link Connection Issues (4:00)
Inter-Processor Communication with Hardware Semaphores(HSEM)
Programming: Analyzing the Hardware Semaphore(HSEM) Documentation (7:12)
Programming: Enabling the Project Peripherals and HSEM Interrupt (13:22)
Programming: Analyzing the Hardware Semaphore Functions (6:38)
Programming: HSEM for Notification- The CPU1 Logic (3:13)
Programming: HSEM for Notification- The CPU2 Logic (7:19)
Programming Testing the HSEM Notification Project (5:33)
Programming: Creating Another Hardware Semaphore (3:57)
Programming: Ensuring Sequential Execution with Hardware Semaphores (12:04)
Programming: Ensuring Robust Resource Sharing with Hardware Semaphores (8:03)
Inter-Processor Communication with OpenAMP and RPMsg
Programming: Configuring the OpenAMP Project(Pt.1) (7:48)
Programming: Configuring the OpenAMP Project(Pt.2) (6:36)
Programming: Troubleshooting Potential Project Creation Issues (7:16)
Programming: Locating the Base Address of the SRAM (8:02)
Programming: Defining the Memory Region for the Shared Memory and Resouce Table (6:11)
Programming: Allocating and Defining the Section for the Resource Table (3:49)
Programming: Defining Memory Regions and Section Allocation for CPU2 (2:14)
Programming: Analyzing the OpenAMP File (6:44)
Programming: Declaring the Required Variables and Flags (4:55)
Programming: Implementing the RPMSG Receive Callback (3:52)
Programming: Implementing the 'Service Created' Callback (6:04)
Inter-Processor Communication in an RTOS Environment
Programming: Configuring FreeRTOS
Programming: Implementing the Message Buffer
Programming: Testing the System
Debugging, Profiling, and Project Management
Some Performance Profiling and Project Management Techniques (2:30)
Some Debugging Techniques for MultiCore Systems (3:31)
Design Patterns and Testing Techniques (3:00)
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Understanding IPCC for Remote Service Access
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